SEMICONDUCTOR FABRICATION: A Practical Guide to Modern Chip Making, Advanced Nodes, EUV Lithography, and Yield Optimization (Huds)
Stavka #: 270179661

SEMICONDUCTOR FABRICATION: A Practical Guide to Modern Chip Making, Advanced Nodes, EUV Lithography, and Yield Optimization (Huds)

Stavka #: 270179661

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Shop SEMICONDUCTOR FABRICATION: A Practical Guide to Modern Chip Making, Advanced Nodes, EUV Lithography, and Yield Optimization (Huds) online at a best price in Croatia. B0HDM939F2
  • Every layer on a modern chip is the result of a decision someone had to defend: which process, which parameter window, which trade-off to accept. This book is about making those decisions with understanding rather than habit.A recipe can be followed without being understood — until something drifts. A film comes out thin at the wafer edge. Critical dimensions widen after a resist change. A via chain fails electrical test and nobody can say which module owns the problem. Engineers and technicians who know what each step is physically doing can reason their way to the cause. Those who know only the recipe are left guessing, and the guessing is expensive.This guide builds that reasoning process by process. Each unit operation is developed from the physics and chemistry that govern it, then followed onto the factory floor: the equipment that performs it, the parameters that control it, the failure modes that limit it, and the measurements that prove it worked. Every worked example is carried through in SI units with the units tracked explicitly, so the arithmetic can be reproduced, checked and adapted to your own numbers.What you will be able to work with:▪ Die per wafer, cost per good die, and how a change in yield moves both▪ Oxide growth in the linear and parabolic regimes, and the choice between dry and wet oxidation▪ Implant dose, projected range, straggle and junction depth — and when channelling will distort a profile▪ Resolution and depth-of-focus relationships, and what a given exposure approach can realistically print▪ The selectivity, anisotropy and damage arguments behind wet, plasma and atomic-layer etching▪ Deposition selection by step coverage, thermal budget and film stress▪ Control charts, process capability indices, and the separation of random from systematic yield lossThe coverage runs the length of the flow: crystal growth and wafer preparation, contamination control, thermal oxidation, diffusion and ion implantation, photolithography including extreme-ultraviolet and high-numerical-aperture exposure, etching, thin-film deposition, chemical mechanical planarization, copper interconnect and low-permittivity dielectrics, front-end device integration, advanced nodes and chiplet packaging, metrology and defect inspection, yield and reliability engineering, and assembly, packaging and final test. 151 figures, 74 worked examples and 54 comparison tables support the text, and each of the 15 chapters opens with learning objectives and closes with a summary.It is written for students entering microelectronics, for process and equipment technicians who want the reasoning behind their recipes, and for practising engineers moving between modules. First-year chemistry and physics and elementary calculus are the only prerequisites.Add this practical resource to your bench and start working through the calculations, trade-offs and control decisions that a fab makes every day.
Publisher Independently published
Publication date August 9, 2026
Language English
Print length 374 pages
ISBN-13 979-8191781785
Item Weight 2.28 pounds (1.03 kg)
Dimensions 8.49 x 1.04 x 11.24 inches (21.6 x 2.6 x 28.5 cm)
Book 1 of 2 Huds

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SEMICONDUCTOR FABRICATION: A Practical Guide to Modern Chip Making, Advanced Nodes, EUV Lithography, and Yield Optimization (Huds)

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